Event-Based Gesture Recognition through a Hierarchy of Time-Surfaces for FPGA.
Neuromorphic vision sensors detect changes in luminosity taking inspiration from mammalian retina and providing a stream of events with high temporal resolution, also known as Dynamic Vision Sensors (DVS). This continuous stream of events can be used to extract spatio-temporal patterns from a scene. A time-surface represents a spatio-temporal context for a given spatial radius around an incoming event from a sensor at a specific time history. Time-surfaces can be organized in a hierarchical way to extract features from input events using the Hierarchy Of Time-Surfaces algorithm, hereinafter HOTS. HOTS can be organized in consecutive layers to extract combination of features in a similar way as some deep-learning algorithms do. This work introduces a novel FPGA architecture for accelerating HOTS network. This architecture is mainly based on block-RAM memory and the non-restoring square root algorithm, requiring basic components and enabling it for low-power low-latency embedded applications. The presented architecture has been tested on a Zynq 7100 platform at 100 MHz. The results show that the latencies are in the range of 1 μ s to 6.7 μ s, requiring a maximum dynamic power consumption of 77 mW. This system was tested with a gesture recognition dataset, obtaining an accuracy loss for 16-bit precision of only 1.2% with respect to the original software HOTS.
['Tapiador-Morales|Ricardo|R|0000-0002-7268-2915', 'Maro|Jean-Matthieu|JM|', 'Jimenez-Fernandez|Angel|A|0000-0003-3061-5922', 'Jimenez-Moreno|Gabriel|G|0000-0003-4512-6750', 'Benosman|Ryad|R|', 'Linares-Barranco|Alejandro|A|0000-0002-6056-740X']
event-based FPGA dynamic vision sensors AER HDL pattern recognition synchronous digital VLSI