Cadence claims that about forty nm tapeouts have used Cadences netlisttoGDSII flow, and at least a few have used Cadence synthesis. 마그마는 블록 레벨 설계뿐만 아니라 최소 20nm 테이프아웃에 참여했다고 주장합니다. The real story is that big EDA customers shop around.